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Searched refs:SDMA0_QUEUE0_RB_CNTL__F32_WPTR_POLL_ENABLE__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v11.c432 1 << SDMA0_QUEUE0_RB_CNTL__F32_WPTR_POLL_ENABLE__SHIFT; in update_mqd_sdma()
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v6_0.c827 1 << SDMA0_QUEUE0_RB_CNTL__F32_WPTR_POLL_ENABLE__SHIFT; in sdma_v6_0_mqd_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h982 #define SDMA0_QUEUE0_RB_CNTL__F32_WPTR_POLL_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h1029 #define SDMA0_QUEUE0_RB_CNTL__F32_WPTR_POLL_ENABLE__SHIFT … macro