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Searched refs:SDMA0_BASE__INST2_SEG3 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h689 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Dsienna_cichlid_ip_offset.h889 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Dbeige_goby_ip_offset.h1046 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Dvega10_ip_offset.h1010 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Drenoir_ip_offset.h1132 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Dyellow_carp_offset.h1137 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Darct_ip_offset.h935 #define SDMA0_BASE__INST2_SEG3 0 macro
H A Daldebaran_ip_offset.h1216 #define SDMA0_BASE__INST2_SEG3 0 macro