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Searched refs:SDMA0_BASE__INST2_SEG1 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h687 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Dsienna_cichlid_ip_offset.h887 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Dbeige_goby_ip_offset.h1044 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Dvega10_ip_offset.h1008 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Drenoir_ip_offset.h1130 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Dyellow_carp_offset.h1135 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Darct_ip_offset.h933 #define SDMA0_BASE__INST2_SEG1 0 macro
H A Daldebaran_ip_offset.h1214 #define SDMA0_BASE__INST2_SEG1 0 macro