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Searched refs:SDC_GW_CTRL (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/video/
H A Dmx3fb.c159 #define SDC_GW_CTRL (0xB8 + IPU_BASE) macro
752 reg = readl(SDC_GW_CTRL) & 0x00FFFFFFL; in ll_disp3_enable()
753 writel(reg | ((uint32_t) 0xff << 24), SDC_GW_CTRL); in ll_disp3_enable()