SD25G_LANE_CMU_13_CFG_PLL_RESERVE_3_0_SET (reference) in projects: openbmc

Searched refs:SD25G_LANE_CMU_13_CFG_PLL_RESERVE_3_0_SET (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/phy/microchip/
H A D	sparx5_serdes.c	`1201 sdx5_rmw(SD25G_LANE_CMU_13_CFG_PLL_RESERVE_3_0_SET in sparx5_sd25g28_apply_params()`
H A D	sparx5_serdes_regs.h	`1127 #define SD25G_LANE_CMU_13_CFG_PLL_RESERVE_3_0_SET(x)\ macro`