Searched refs:SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET (Results 1 – 2 of 2) sorted by relevance
1282 sdx5_rmw(SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET(params->cfg_sel_div_3_0), in sparx5_sd25g28_apply_params()
1112 #define SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET(x)\ macro