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Searched refs:SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/phy/microchip/
H A Dsparx5_serdes.c1282 sdx5_rmw(SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET(params->cfg_sel_div_3_0), in sparx5_sd25g28_apply_params()
H A Dsparx5_serdes_regs.h1112 #define SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET(x)\ macro