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Searched refs:SD10G_LANE_LANE_0E_CFG_EQC_FORCE_3_0_SET (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/phy/microchip/
H A Dsparx5_serdes.c1832 sdx5_inst_rmw(SD10G_LANE_LANE_0E_CFG_EQC_FORCE_3_0_SET in sparx5_sd10g28_apply_params()
H A Dsparx5_serdes_regs.h245 #define SD10G_LANE_LANE_0E_CFG_EQC_FORCE_3_0_SET(x)\ macro