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Searched refs:SC_VPLL27BCTRL (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Dpll-pro4.c32 tmp = readl(SC_VPLL27BCTRL); in vpll_init()
34 writel(tmp, SC_VPLL27BCTRL); in vpll_init()
100 tmp = readl(SC_VPLL27BCTRL); in vpll_init()
102 writel(tmp, SC_VPLL27BCTRL); in vpll_init()
H A Dpll-ld4.c66 tmp = readl(SC_VPLL27BCTRL); in vpll_init()
68 writel(tmp, SC_VPLL27BCTRL); in vpll_init()
142 tmp = readl(SC_VPLL27BCTRL); in vpll_init()
144 writel(tmp, SC_VPLL27BCTRL); in vpll_init()
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dsc-regs.h37 #define SC_VPLL27BCTRL (SC_BASE_ADDR | 0x1290) macro