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Searched refs:SC_VPLL27ACTRL2 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Dpll-ld4.c79 tmp = readl(SC_VPLL27ACTRL2); in vpll_init()
81 writel(tmp, SC_VPLL27ACTRL2); in vpll_init()
87 tmp = readl(SC_VPLL27ACTRL2); in vpll_init()
90 writel(tmp, SC_VPLL27ACTRL2); in vpll_init()
131 tmp = readl(SC_VPLL27ACTRL2); in vpll_init()
133 writel(tmp, SC_VPLL27ACTRL2); in vpll_init()
H A Dpll-pro4.c45 tmp = readl(SC_VPLL27ACTRL2); in vpll_init()
48 writel(tmp, SC_VPLL27ACTRL2); in vpll_init()
89 tmp = readl(SC_VPLL27ACTRL2); in vpll_init()
91 writel(tmp, SC_VPLL27ACTRL2); in vpll_init()
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dsc-regs.h34 #define SC_VPLL27ACTRL2 (SC_BASE_ADDR | 0x1274) macro