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Searched refs:SC_RSTCTRL6 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Dclk-ld20.c18 tmp = readl(SC_RSTCTRL6); in uniphier_ld20_clk_init()
20 writel(tmp, SC_RSTCTRL6); in uniphier_ld20_clk_init()
H A Dclk-pxs3.c18 tmp = readl(SC_RSTCTRL6); in uniphier_pxs3_clk_init()
20 writel(tmp, SC_RSTCTRL6); in uniphier_pxs3_clk_init()
H A Dclk-pxs2.c33 tmp = readl(SC_RSTCTRL6); in uniphier_pxs2_clk_init()
35 writel(tmp, SC_RSTCTRL6); in uniphier_pxs2_clk_init()
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dsc64-regs.h18 #define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) macro
H A Dsc-regs.h69 #define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) macro