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Searched refs:SC_RSTCTRL2_NRST_USB3B1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Dclk-pro5.c28 tmp |= SC_RSTCTRL2_NRST_USB3B1; in uniphier_pro5_clk_init()
H A Dclk-pro4.c31 tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; in uniphier_pro4_clk_init()
H A Dclk-pxs2.c29 tmp |= SC_RSTCTRL2_NRST_USB3B1; in uniphier_pxs2_clk_init()
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dsc-regs.h52 #define SC_RSTCTRL2_NRST_USB3B1 (0x1 << 17) /* USB3 #1 bus */ macro