Home
last modified time | relevance | path

Searched refs:SC_CNTCR_FREQ0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/
H A Dsyscounter.c71 val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1); in timer_init()
72 val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG; in timer_init()
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dsoc.c40 clrsetbits_le32(&sctr->cntcr, SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1, in timer_init()
41 SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG); in timer_init()
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Dsyscounter.h25 #define SC_CNTCR_FREQ0 (1 << 8) macro