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Searched refs:SCU_MPLL_NUM_SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dscu_ast2400.h17 #define SCU_MPLL_NUM_SHIFT 5 macro
18 #define SCU_MPLL_NUM_MASK (0xff << SCU_MPLL_NUM_SHIFT)
H A Dscu_ast2500.h20 #define SCU_MPLL_NUM_SHIFT 5 macro
21 #define SCU_MPLL_NUM_MASK (0xff << SCU_MPLL_NUM_SHIFT)
/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2500.c67 const ulong num = (mpll_reg & SCU_MPLL_NUM_MASK) >> SCU_MPLL_NUM_SHIFT; in ast2500_get_mpll_rate()
334 .num = (SCU_MPLL_NUM_MASK >> SCU_MPLL_NUM_SHIFT), in ast2500_configure_ddr()
345 | (div_cfg.num << SCU_MPLL_NUM_SHIFT) in ast2500_configure_ddr()
H A Dclk_ast2400.c360 .num = (SCU_MPLL_NUM_MASK >> SCU_MPLL_NUM_SHIFT), in ast2400_configure_ddr()
371 | (div_cfg.num << SCU_MPLL_NUM_SHIFT) in ast2400_configure_ddr()