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Searched refs:SCU_HPLL_POST_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dscu_ast2400.h28 #define SCU_HPLL_POST_MASK (0x3f << SCU_HPLL_POST_SHIFT) macro
H A Dscu_ast2500.h31 #define SCU_HPLL_POST_MASK (0x3f << SCU_HPLL_POST_SHIFT) macro
/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2500.c89 const ulong post_div = (hpll_reg & SCU_HPLL_POST_MASK) in ast2500_get_hpll_rate()