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Searched refs:SCR_RW (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/arm/
H A Dcpu.h1664 #define SCR_RW (1ULL << 10)
2623 aa64 = aa64 && (env->cp15.scr_el3 & SCR_RW); in arm_el_is_aa64()
1661 #define SCR_RW global() macro
H A Dcpu.c620 env->cp15.scr_el3 |= SCR_RW; in arm_emulate_firmware_reset()
H A Dhelper.c1891 value |= SCR_RW; /* RAO/WI */ in scr_write()
1933 valid_mask &= ~(SCR_RW | SCR_ST); in scr_write()
10994 rw = ((env->cp15.scr_el3 & SCR_RW) == SCR_RW); in aarch64_sync_64_to_32()
11803 is_aa64 = (env->cp15.scr_el3 & SCR_RW) != 0; in tcg_handle_semihosting()