Home
last modified time | relevance | path

Searched refs:SCLK_I2C0_PMU (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rv1108.c418 case SCLK_I2C0_PMU: in rv1108_i2c_get_clk()
455 case SCLK_I2C0_PMU: in rv1108_i2c_set_clk()
557 case SCLK_I2C0_PMU: in rv1108_clk_get_rate()
607 case SCLK_I2C0_PMU: in rv1108_clk_set_rate()
H A Dclk_rk3399.c1253 case SCLK_I2C0_PMU: in rk3399_i2c_get_pmuclk()
1282 case SCLK_I2C0_PMU: in rk3399_i2c_set_pmuclk()
1324 case SCLK_I2C0_PMU: in rk3399_pmuclk_get_rate()
1349 case SCLK_I2C0_PMU: in rk3399_pmuclk_set_rate()
/openbmc/linux/include/dt-bindings/clock/
H A Drv1108-cru.h41 #define SCLK_I2C0_PMU 91 macro
H A Drk3399-cru.h351 #define SCLK_I2C0_PMU 9 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drv1108-cru.h41 #define SCLK_I2C0_PMU 91 macro
H A Drk3399-cru.h349 #define SCLK_I2C0_PMU 9 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rv1108.c288 COMPOSITE(SCLK_I2C0_PMU, "sclk_i2c0_pmu", mux_pll_src_2plls_p, 0,
H A Dclk-rk3399.c1428 COMPOSITE_NOMUX(SCLK_I2C0_PMU, "clk_i2c0_pmu", "ppll", 0,
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1108.dtsi374 clocks = <&cru SCLK_I2C0_PMU>, <&cru PCLK_I2C0_PMU>;
/openbmc/u-boot/arch/arm/dts/
H A Drk3399.dtsi1120 assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
1122 clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399.dtsi1274 assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
1276 clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;