Home
last modified time | relevance | path

Searched refs:SCG_SOSC_DIV2_CLK (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dclock.c262 lpuart_set_clk(index, SCG_SOSC_DIV2_CLK); in init_clk_lpuart()
H A Dpcc.c26 { SCG_SOSC_DIV2_CLK, /* SOSC BUS clock */
H A Dscg.c138 case SCG_SOSC_DIV2_CLK: in scg_soscdiv_get_rate()
569 case SCG_SOSC_DIV2_CLK: in scg_clk_get_rate()
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dscg.h213 SCG_SOSC_DIV2_CLK, enumerator