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Searched refs:SCG_PLL_PFD0_GATE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dscg.c173 gate = SCG_PLL_PFD0_GATE_MASK; in scg_apll_pfd_get_rate()
223 gate = SCG_PLL_PFD0_GATE_MASK; in scg_spll_pfd_get_rate()
627 gate = SCG_PLL_PFD0_GATE_MASK; in scg_enable_pll_pfd()
870 SCG_PLL_PFD0_GATE_MASK); in scg_a7_spll_init()
895 val &= ~SCG_PLL_PFD0_GATE_MASK; in scg_a7_spll_init()
991 val &= ~SCG_PLL_PFD0_GATE_MASK; in scg_a7_apll_init()
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dscg.h154 #define SCG_PLL_PFD0_GATE_MASK (0x00000080) macro