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Searched refs:SCG_PLL_CFG_PFDSEL_SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dscg.h176 #define SCG_PLL_CFG_PFDSEL_SHIFT (14) macro
177 #define SCG_PLL_CFG_PFDSEL_MASK ((0x3UL) << SCG_PLL_CFG_PFDSEL_SHIFT)
/openbmc/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dscg.c287 SCG_PLL_CFG_PFDSEL_SHIFT; in scg_apll_get_rate()
320 SCG_PLL_CFG_PFDSEL_SHIFT; in scg_spll_get_rate()
343 SCG_PLL_CFG_PFDSEL_SHIFT; in scg_ddr_get_rate()
827 #define SCG1_SPLL_CFG_PFDSEL_NUM ((0) << SCG_PLL_CFG_PFDSEL_SHIFT)
928 #define SCG1_APLL_CFG_PFDSEL_NUM ((0) << SCG_PLL_CFG_PFDSEL_SHIFT)