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Searched refs:SCG_APLL_CSR_APLLVLD_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dscg.h146 #define SCG_APLL_CSR_APLLVLD_MASK (0x01000000) macro
/openbmc/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dscg.c511 if (!(reg & SCG_APLL_CSR_APLLVLD_MASK)) in decode_pll()
980 while (!(readl(&scg1_regs->apllcsr) & SCG_APLL_CSR_APLLVLD_MASK)) in scg_a7_apll_init()