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Searched refs:SCBRR (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/board/renesas/ap325rxa/
H A Dcpld-ap325rxa.c31 #define SCBRR (vu_char *)(SCIF_BASE + 0x04) macro
76 *SCBRR = BPS_SETTING_VALUE; in init_cpld_loader()
/openbmc/u-boot/drivers/serial/
H A Dserial_sh.h525 SCIF_FNS(SCBRR, 0x04, 8)
539 SCIF_FNS(SCBRR, 0x04, 8)
555 SCIx_FNS(SCBRR, 0x04, 8, 0x04, 8)
570 SCIx_FNS(SCBRR, 0, 0, 0x04, 8, 0, 0, 0x04, 8, 0, 0)
589 SCIx_FNS(SCBRR, 0x02, 8, 0x04, 8, 0x02, 8, 0x04, 8, 0x01, 8)
H A Dserial_sh.c77 sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk)); in sh_serial_setbrg_generic()
/openbmc/linux/drivers/tty/serial/
H A Dsh-sci.c182 [SCBRR] = { 0x01, 8 },
202 [SCBRR] = { 0x02, 8 },
224 [SCBRR] = { 0x04, 8 },
248 [SCBRR] = { 0x04, 8 },
274 [SCBRR] = { 0x04, 8 },
301 [SCBRR] = { 0x02, 8 },
326 [SCBRR] = { 0x02, 8 },
348 [SCBRR] = { 0x04, 8 },
373 [SCBRR] = { 0x04, 8 },
399 [SCBRR] = { 0x04, 8 },
[all …]
H A Dsh-sci.h16 SCBRR, /* Bit Rate Register */ enumerator