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Searched refs:SBI_PMU_EVENT_CACHE_OP_ID_CODE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dsbi.h215 #define SBI_PMU_EVENT_CACHE_OP_ID_CODE_MASK 0x06 macro
/openbmc/linux/arch/riscv/kvm/
H A Dvcpu_pmu.c99 cache_op = (sbi_event_code & SBI_PMU_EVENT_CACHE_OP_ID_CODE_MASK) >> in kvm_pmu_get_perf_event_cache_config()