| /openbmc/u-boot/arch/xtensa/cpu/ |
| H A D | start.S | 421 rsr a2, SAR
483 wsr a2, SAR
|
| /openbmc/openbmc-test-automation/lib/ |
| H A D | resource.robot | 120 ${SYN_ACK_RESET} SAR
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | armada-xp-synology-ds414.dts | 159 * pin being sampled at reset (bit 0 of SAR).
|
| /openbmc/qemu/target/xtensa/ |
| H A D | cpu.h | 115 SAR = 3, enumerator
|
| /openbmc/u-boot/arch/arm/include/asm/arch-imx/ |
| H A D | imx-regs.h | 348 #define SAR(x) __REG2( IMX_DMAC_BASE + 0x80, (x) << 6) /* Source Address Registers */ macro
|
| /openbmc/qemu/target/xtensa/core-lx106/ |
| H A D | xtensa-modules.c.inc | 53 { "SAR", 3, 0 },
94 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/xtensa/core-fsf/ |
| H A D | xtensa-modules.c.inc | 59 { "SAR", 3, 0 },
119 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/xtensa/core-sample_controller/ |
| H A D | xtensa-modules.c.inc | 70 { "SAR", 3, 0 },
135 { "SAR", 6, 0 },
|
| /openbmc/qemu/tests/tcg/i386/ |
| H A D | x86.csv | 1810 "SAR r/m8, 1","SARB 1, r/m8","sarb 1, r/m8","D0 /7","V","V","","","rw,r","Y","8"
1811 "SAR r/m8, 1","SARB 1, r/m8","sarb 1, r/m8","REX D0 /7","N.E.","V","","pseudo64","rw,r","Y","8"
1812 "SAR r/m8, CL","SARB CL, r/m8","sarb CL, r/m8","D2 /7","V","V","","","rw,r","Y","8"
1813 "SAR r/m8, CL","SARB CL, r/m8","sarb CL, r/m8","REX D2 /7","N.E.","V","","pseudo64","rw,r","Y","8"
1814 "SAR r/m8, imm8","SARB imm8, r/m8","sarb imm8, r/m8","REX C0 /7 ib","N.E.","V","","pseudo64","rw,r"…
1815 "SAR r/m8, imm8u","SARB imm8u, r/m8","sarb imm8u, r/m8","C0 /7 ib","V","V","","","rw,r","Y","8"
1816 "SAR r/m32, 1","SARL 1, r/m32","sarl 1, r/m32","D1 /7","V","V","","operand32","rw,r","Y","32"
1817 "SAR r/m32, CL","SARL CL, r/m32","sarl CL, r/m32","D3 /7","V","V","","operand32","rw,r","Y","32"
1818 "SAR r/m32, imm8u","SARL imm8u, r/m32","sarl imm8u, r/m32","C1 /7 ib","V","V","","operand32","rw,r"…
1819 "SAR r/m64, 1","SARQ 1, r/m64","sarq 1, r/m64","REX.W D1 /7","N.S.","V","","","rw,r","Y","64"
[all …]
|
| /openbmc/qemu/target/xtensa/core-dc233c/ |
| H A D | xtensa-modules.c.inc | 80 { "SAR", 3, 0 },
155 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/xtensa/core-de212/ |
| H A D | xtensa-modules.c.inc | 79 { "SAR", 3, 0 },
147 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/xtensa/core-dc232b/ |
| H A D | xtensa-modules.c.inc | 76 { "SAR", 3, 0 },
150 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/s390x/tcg/ |
| H A D | insn-data.h.inc | 798 C(0xb24e, SAR, RRE, Z, 0, r2_o, 0, 0, sar, 0)
|
| /openbmc/openbmc/meta-raspberrypi/dynamic-layers/multimedia-layer/recipes-multimedia/rpidistro-vlc/files/ |
| H A D | 0004-mmal_20.patch | 1058 + // Otherwise guess SAR 1:1
1210 + dec->fmt_out.video.i_sar_num = sys->output_format->es->video.par.num; // SAR can be killed by…
9552 + // Fix up SAR if unset
11680 + // Fix SAR if unknown
|
| /openbmc/qemu/target/xtensa/core-de233_fpu/ |
| H A D | xtensa-modules.c.inc | 80 { "SAR", 3, 0 },
157 { "SAR", 6, 0 },
|
| /openbmc/openbmc/poky/meta/recipes-bsp/v86d/v86d/ |
| H A D | Update-x86emu-from-X.org.patch | 16874 Implements the SAR instruction and side effects.
16946 Implements the SAR instruction and side effects.
17007 Implements the SAR instruction and side effects.
|
| /openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/ |
| H A D | xtensa-modules.c.inc | 57 { "SAR", 3, 0 },
113 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/xtensa/core-test_kc705_be/ |
| H A D | xtensa-modules.c.inc | 80 { "SAR", 3, 0 },
161 { "SAR", 6, 0 },
|
| /openbmc/qemu/target/xtensa/core-dsp3400/ |
| H A D | xtensa-modules.c.inc | 69 { "SAR", 3, 0 },
204 { "SAR", 6, 0 },
|
| /openbmc/openbmc/meta-raspberrypi/recipes-multimedia/rpidistro-ffmpeg/files/ |
| H A D | 0001-ffmpeg-5.1.4-rpi_24.patch | 3734 + av_log(avctx, AV_LOG_DEBUG, "Source change: Fmt: %s, SAR: %d/%d, wxh %dx%d crop %dx%d @ %d,%d,…
|