Searched refs:SABRE_CEAFSR_PDWR (Results 1 – 1 of 1) sorted by relevance
45 #define SABRE_CEAFSR_PDWR 0x2000000000000000UL /* Primary PCI DMA Write */ macro271 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | in sabre_ce_intr()282 ((error_bits & SABRE_CEAFSR_PDWR) ? in sabre_ce_intr()351 upa_writeq((SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | in sabre_register_error_handlers()