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/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi128 nocclk = <0x0384000b>; /* Register: nocclk */
129 mpuclk = <0x03840001>; /* Register: mpuclk */
153 <0x00000000 0x00000008>, /* Register: pinmux_shared_io_q1_1 */
154 <0x00000004 0x00000008>, /* Register: pinmux_shared_io_q1_2 */
155 <0x00000008 0x00000008>, /* Register: pinmux_shared_io_q1_3 */
156 <0x0000000c 0x00000008>, /* Register: pinmux_shared_io_q1_4 */
157 <0x00000010 0x00000008>, /* Register: pinmux_shared_io_q1_5 */
263 <0x0000000c 0x00000000>, /* Register: pinmux_i2c0_usefpga */
264 <0x00000010 0x00000000>, /* Register: pinmux_i2c1_usefpga */
268 <0x00000020 0x00000000>, /* Register: pinmux_nand_usefpga */
[all …]
/openbmc/linux/drivers/scsi/pcmcia/
H A Dnsp_io.h21 unsigned int Register,
24 unsigned int Register);
48 unsigned int Register) in nsp_index_read() argument
55 unsigned int Register, in nsp_index_write() argument
68 unsigned int Register, in nsp_multi_read_1() argument
87 unsigned int Register, in nsp_multi_read_2() argument
106 unsigned int Register, in nsp_multi_read_4() argument
125 unsigned int Register, in nsp_multi_write_1() argument
143 unsigned int Register, in nsp_multi_write_2() argument
220 unsigned int Register, in nsp_mmio_multi_read_4() argument
[all …]
/openbmc/u-boot/board/Synology/ds109/
H A Dopenocd.cfg45 mww 0xD0001404 0x39743000 ;# Dunit Control Low Register
50 mww 0xD0001418 0x00000000 ;# DDR SDRAM Operation Register
51 mww 0xD000141C 0x00000C62 ;# DDR SDRAM Mode Register
53 mww 0xD0001424 0x0000F1FF ;# Dunit Control High Register
54 mww 0xD0001428 0x00085520 ;# Dunit Control High Register
55 mww 0xD000147c 0x00008552 ;# Dunit Control High Register
57 mww 0xD0001504 0x07FFFFF1 ;# CS0n Size Register
58 mww 0xD0001508 0x10000000 ;# CS1n Base Register
59 mww 0xD000150C 0x00000000 ;# CS1n Size Register
61 mww 0xD0001514 0x00000000 ;# CS2n Size Register
[all …]
/openbmc/ipmitool/contrib/
H A Doem_ibm_sel_map126 …evice ID (MSB)","Vendor ID (LSB)","Vendor ID (MSB)","Status Register (LSB)","Status Register (MSB)…
164 …,"Vendor ID (MSB)","Status Register (LSB)","Status Register (MSB)","DevFun Number","0x00","PERR: P…
165 …,"Vendor ID (MSB)","Status Register (LSB)","Status Register (MSB)","DevFun Number","0x00","SERR: P…
182 "0xE1","0x04","0x00","0x00","FSB FERR/NERR Register","FSB FERR/NERR Register","Chassis Number","R",…
183 "0xE1","0x04","0x00","0x01","FSB FERR/NERR Register","FSB FERR/NERR Register","Chassis Number","R",…
184 "0xE1","0x04","0x00","0x02","FSB FERR/NERR Register","FSB FERR/NERR Register","Chassis Number","R",…
185 "0xE1","0x04","0x00","0x03","FSB FERR/NERR Register","FSB FERR/NERR Register","Chassis Number","R",…
192 …Register ID","R","First Fire Bit (0xFF=N/A)","Register Data (LSB)","Register Data","Register Data"…
193 …Register ID","R","First Fire Bit (0xFF if N/A)","Register Data (LSB)","Register Data","Register Da…
194 …Register ID","R","First Fire Bit (0xFF if N/A)","Register Data (LSB)","Register Data","Register Da…
[all …]
/openbmc/linux/Documentation/scsi/
H A Dhptiop.rst8 Controller Register Map
14 BAR0 offset Register
21 BAR2 offset Register
23 0x10 Inbound Message Register 0
24 0x14 Inbound Message Register 1
27 0x20 Inbound Doorbell Register
39 BAR0 offset Register
57 BAR0 offset Register
66 BAR1 offset Register
81 BAR0 offset Register
[all …]
/openbmc/linux/Documentation/driver-api/mmc/
H A Dmmc-dev-attrs.rst20 cid Card Identification Register
21 csd Card Specific Data Register
22 scr SD Card Configuration Register (SD only)
23 date Manufacturing Date (from CID Register)
28 manfid Manufacturer ID (from CID Register)
29 name Product Name (from CID Register)
30 oemid OEM/Application ID (from CID Register)
31 prv Product Revision (from CID Register)
33 serial Product Serial Number (from CID Register)
38 ocr Operation Conditions Register
[all …]
/openbmc/u-boot/board/renesas/MigoR/
H A Dlowlevel_init.S31 write32 CCR_A, CCR_D ! Address of Cache Control Register
34 write32 MMUCR_A, MMUCR_D ! Address of MMU Control Register
37 write32 MSTPCR0_A, MSTPCR0_D ! Address of Power Control Register 0
39 write32 MSTPCR2_A, MSTPCR2_D ! Address of Power Control Register 2
49 write16 RWTCSR_A, RWTCSR_D_1 ! 0xA4520004 (Watchdog Control / Status Register)
52 write16 RWTCNT_A, RWTCNT_D ! 0xA4520000 (Watchdog Count Register)
55 write16 RWTCSR_A, RWTCSR_D_2 ! 0xA4520004 (Watchdog Control / Status Register)
64 write32 CCR_A, CCR_D_2 ! Address of Cache Control Register
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dserial.patch8 { "ISAR", 0x403016A0, 0, 0xffffffff, 'x', "I2C Slave Address Register" },
11 +{ "HW_MCR", 0x41600010, 0, 0xffffffff, 'x', "HWUART Modem Control Register" },
12 +{ "HW_MSR", 0x41600018, 0, 0xffffffff, 'x', "HWUART Modem Status Register" },
14 { "PMCR", 0x40F00000, 0, 0xffffffff, 'x', "Power Manager Control Register (3-23)" },
H A Dusb.patch8 { "ISAR", 0x403016A0, 0, 0xffffffff, 'x', "I2C Slave Address Register" },
11 +{ "UP2OCR", 0x40600020, 0, 0xffffffff, 'x', "USB Port 2 Output Control Register" },
17 { "HW_MCR", 0x41600010, 0, 0xffffffff, 'x', "HWUART Modem Control Register" },
18 { "HW_MSR", 0x41600018, 0, 0xffffffff, 'x', "HWUART Modem Status Register" },
/openbmc/openpower-hw-diags/analyzer/plugins/
H A Dp10-tod-plugins.cpp123 enum class Register enum
133 bool readRegister(pdbg_target* i_chip, Register i_addr, in readRegister()
195 if (readRegister(i_chip, Register::TOD_ERROR, errorReg)) in collectTodFaultData()
201 if (readRegister(i_chip, Register::TOD_PSS_MSS_STATUS, statusReg)) in collectTodFaultData()
266 ? (isPriTop ? Register::TOD_PRI_PORT_0_CTRL in collectTodFaultData()
267 : Register::TOD_SEC_PORT_0_CTRL) in collectTodFaultData()
268 : (isPriTop ? Register::TOD_PRI_PORT_1_CTRL in collectTodFaultData()
269 : Register::TOD_SEC_PORT_1_CTRL); in collectTodFaultData()
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/nodejs/nodejs/
H A D0001-liftoff-Correct-function-signatures.patch37 - inline void Move(Register dst, Register src, ValueKind);
39 + inline void Move(Register dst, Register src, ValueKind kind);
48 @@ -592,7 +592,7 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
61 @@ -286,7 +286,7 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dfel_utils.S19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
23 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register
33 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register
37 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register
/openbmc/linux/arch/arm/include/debug/
H A Dat91.S19 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
23 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
32 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-cmos.txt11 called "Register B".
13 called "Register A".
15 "Register A" and "B" are usually initialized by the firmware (BIOS for
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dstarfive,jh7110-pcie-phy.yaml26 - description: phandle to System Register Controller sys_syscon node.
29 The phandle to System Register Controller syscon node and the PHY connect offset
36 - description: phandle to System Register Controller stg_syscon node.
40 The phandle to System Register Controller syscon node and the offset
/openbmc/linux/Documentation/devicetree/bindings/hwinfo/
H A Drenesas,prr.yaml7 title: Renesas Product Register
14 Most Renesas ARM SoCs have a Product Register or Boundary Scan ID
15 Register that allows to retrieve SoC product and revision information.
/openbmc/u-boot/arch/arm/mach-uniphier/arm32/
H A Dlowlevel_init.S23 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
42 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
53 mrc p15, 0, r0, c2, c0, 2 @ TTBCR (Translation Table Base Control Register)
65 mcr p15, 0, r0, c3, c0, 0 @ DACR (Domain Access Control Register)
74 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-mmio.yaml43 Register to READ the value of the GPIO lines. If GPIO line is high,
48 Register to SET the value of the GPIO lines. Setting a bit in this
51 Register to CLEAR the value of the GPIO lines. Setting a bit in this
56 Register to set the line as OUTPUT. Setting a bit in this register
60 Register to set this line as INPUT. Setting a bit in this register
/openbmc/openbmc/meta-amd/meta-ethanolx/recipes-amd/amd-fpga/
H A Damd-fpga.bb2 SUMMARY = "AMD FPGA Register Dump Utility"
3 DESCRIPTION = "AMD FPGA Register Dump Utility"
/openbmc/openbmc/meta-amd/meta-daytonax/recipes-amd/amd-fpga/
H A Damd-fpga.bb2 SUMMARY = "AMD FPGA Register Dump Utility"
3 DESCRIPTION = "AMD FPGA Register Dump Utility"
/openbmc/qemu/docs/system/openrisc/
H A Dcpu-features.rst14 the contents of the Unit Presence Register (``UPR``) and CPU Configuration
15 Register (``CPUCFGR``).
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg12 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
24 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
34 DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
35 DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register
36 DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register
42 DATA 0xFFD01400 0x43000400 # SDRAM Configuration Register
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx27-pinctrl.txt24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
30 Register: DDIR
40 3 - Data Register
47 1 - Interrupt Status Register
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dalc5623.txt11 Register. If absent or has the value of 0, the
15 Control Register. If absent or has value 0, the
/openbmc/u-boot/doc/device-tree-bindings/video/osd/
H A Dgdsys,ihs_video_out.txt6 - Register base for the video registers
7 - Register base for the OSD registers

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