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Searched refs:R_P0_RXCK (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852a_rfk.c1026 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _iqk_rxclk_setting()
1028 rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); in _iqk_rxclk_setting()
1034 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _iqk_rxclk_setting()
1036 rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); in _iqk_rxclk_setting()
1668 ori_val = rtw89_phy_read32_mask(rtwdev, R_P0_RXCK + (path << 13), MASKDWORD); in _set_rx_dck()
1672 rtw89_phy_write32_set(rtwdev, R_P0_RXCK + (path << 13), B_P0_RXCK_ON); in _set_rx_dck()
1673 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _set_rx_dck()
1701 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), in _set_rx_dck()
H A Drtw8852c_rfk.c444 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0); in rtw8852c_txck_force()
449 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck); in rtw8852c_txck_force()
450 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1); in rtw8852c_txck_force()
458 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); in rtw8852c_rxck_force()
463 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); in rtw8852c_rxck_force()
464 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); in rtw8852c_rxck_force()
1967 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()
H A Drtw8852b_rfk.c989 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_VAL, 0x2); in _iqk_rxclk_setting()
990 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ON, 0x1); in _iqk_rxclk_setting()
1005 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_VAL, 0x1); in _iqk_rxclk_setting()
1006 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ON, 0x1); in _iqk_rxclk_setting()
H A Drtw8851b.c1057 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ADJ, 0x92); in rtw8851b_bw_setting()
H A Dreg.h4058 #define R_P0_RXCK 0x12A0 macro
H A Drtw8851b_rfk.c1809 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()