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Searched refs:R_ISR (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/hw/intc/
H A Dxilinx_intc.c34 #define R_ISR 0 macro
71 p->regs[R_ISR] |= p->irq_pin_state & ~p->c_kind_of_intr; in update_irq()
75 p->regs[R_IPR] = p->regs[R_ISR] & p->regs[R_IER]; in update_irq()
119 p->regs[R_ISR] &= ~value; /* ACK. */ in pic_write()
130 case R_ISR: in pic_write()
159 p->regs[R_ISR] |= (level << irq); in irq_handler()
H A Dloongson_liointc.c38 #define R_ISR R_MAPPER_END macro
139 case R_ISR: in liointc_read()
/openbmc/qemu/hw/misc/
H A Daspeed_sdmc.c37 #define R_ISR (0x50 / 4) macro
487 case R_ISR: in aspeed_2600_sdmc_write()
H A Dxlnx-zynqmp-apu-ctrl.c73 bool pending = s->regs[R_ISR] & ~s->regs[R_IMR]; in imr_update_irq()
H A Dxlnx-versal-pmc-iou-slcr.c805 bool pending = s->regs[R_ISR] & ~s->regs[R_IMR]; in imr_update_irq()
840 s->regs[R_ISR] |= val; in itr_prew()
/openbmc/qemu/hw/net/
H A Dcadence_gem.c579 s->regs[R_ISR] |= flag & ~(s->regs[R_IMR]); in gem_set_isr()
603 s->regs_ro[R_ISR] = 0xFFFFFFFF; in gem_init_register_masks()
615 s->regs_rtc[R_ISR] = 0xFFFFFFFF; in gem_init_register_masks()
703 qemu_set_irq(s->irq[0], !!s->regs[R_ISR]); in gem_update_int_status()
1572 case R_ISR: in gem_read()