Searched refs:R_IS (Results 1 – 1 of 1) sorted by relevance
224 #define R_IS (0x00C / 4) macro431 s->regs[R_IS] = IS_AUTONEG | IS_RX_DCM_LOCK | IS_MGM_RDY | IS_PHY_RST_DONE; in xilinx_axienet_reset()438 s->regs[R_IP] = s->regs[R_IS] & s->regs[R_IE]; in enet_update_irq()623 case R_IS: in enet_write()688 s->regs[R_IS] |= IS_RX_COMPLETE; in axienet_eth_rx_notify()802 s->regs[R_IS] |= IS_RX_REJECT; in eth_rx()937 s->regs[R_IS] |= IS_TX_COMPLETE; in xilinx_axienet_data_stream_push()