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Searched refs:R_DELAY1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/ssi/
H A Dsifive_spi.c38 #define R_DELAY1 (0x2C / 4) macro
121 s->regs[R_DELAY1] = 0x01; in sifive_spi_reset()