Searched refs:RZG2L_ADIVC_DIVADC_MASK (Results 1 – 1 of 1) sorted by relevance
51 #define RZG2L_ADIVC_DIVADC_MASK GENMASK(8, 0) macro52 #define RZG2L_ADIVC_DIVADC_4 FIELD_PREP(RZG2L_ADIVC_DIVADC_MASK, 0x4)386 reg &= ~RZG2L_ADIVC_DIVADC_MASK; in rzg2l_adc_hw_init()