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Searched refs:RXTX_REG96_MU_FREQ1_SET (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/phy/
H A Dphy-xgene.c421 #define RXTX_REG96_MU_FREQ1_SET(dst, src) \ macro
1072 val = RXTX_REG96_MU_FREQ1_SET(val, 0x10); in xgene_phy_sata_cfg_lanes()