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Searched refs:RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/board/ebv/socrates/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/devboards/dbm-soc1/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/samtec/vining_fpga/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/terasic/de0-nano-soc/qts/
H A Dsdram_config.h111 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/altera/arria5-socdk/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x45 macro
/openbmc/u-boot/board/altera/cyclone5-socdk/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x45 macro
/openbmc/u-boot/board/sr1500/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/terasic/de1-soc/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/terasic/de10-nano/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/terasic/sockit/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/board/is1/qts/
H A Dsdram_config.h109 #define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x46 macro
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dwrap_sdram_config.c217 .lfsr_wr_rd_dm_bank_0_wait = RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT,