Searched refs:RV_MAX_TRIGGERS (Results 1 – 5 of 5) sorted by relevance
173 if (val < RV_MAX_TRIGGERS) { in tselect_csr_write()706 for (int i = 0; i < RV_MAX_TRIGGERS; i++) { in riscv_itrigger_enabled()726 for (int i = 0; i < RV_MAX_TRIGGERS; i++) { in helper_itrigger_match()755 for (int i = 0; i < RV_MAX_TRIGGERS; i++) { in riscv_itrigger_update_count()957 for (i = 0; i < RV_MAX_TRIGGERS; i++) { in riscv_cpu_debug_check_breakpoint()1003 for (i = 0; i < RV_MAX_TRIGGERS; i++) { in riscv_cpu_debug_check_watchpoint()1056 for (i = 0; i < RV_MAX_TRIGGERS; i++) { in riscv_trigger_realize()1068 for (i = 0; i < RV_MAX_TRIGGERS; i++) { in riscv_trigger_reset_hold()
421 target_ulong tdata1[RV_MAX_TRIGGERS];422 target_ulong tdata2[RV_MAX_TRIGGERS];423 target_ulong tdata3[RV_MAX_TRIGGERS];425 struct CPUBreakpoint *cpu_breakpoint[RV_MAX_TRIGGERS];426 struct CPUWatchpoint *cpu_watchpoint[RV_MAX_TRIGGERS];427 QEMUTimer *itrigger_timer[RV_MAX_TRIGGERS];
256 VMSTATE_UINTTL_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS),257 VMSTATE_UINTTL_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS),258 VMSTATE_UINTTL_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS),
27 #define RV_MAX_TRIGGERS 2 macro
4303 if (env->trigger_cur >= RV_MAX_TRIGGERS && csrno == CSR_TDATA1) { in read_tdata()