Searched refs:RVU (Results 1 – 8 of 8) sorted by relevance
/openbmc/linux/Documentation/networking/device_drivers/ethernet/marvell/ |
H A D | octeontx2.rst | 4 Marvell OcteonTx2 RVU Kernel Drivers 21 Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC maps HW 25 RVU supports multiple PCIe SRIOV physical functions (PFs) and virtual 30 RVU managed networking functional blocks 37 RVU managed non-networking functional blocks 60 of RVU. Wrt networking there will be 3 flavours of drivers. 85 - Map a physical link to a RVU PF to which a netdev is registered. 184 4. RVU events 215 NPA RVU Interrupt Reg : 1 246 4. RVU events [all …]
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/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/ |
H A D | Kconfig | 3 # Marvell RVU Network drivers configuration 10 tristate "Marvell OcteonTX2 RVU Admin Function driver" 18 Unit's admin function manager which manages all RVU HW resources 20 enabled for other RVU device drivers to work.
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/openbmc/qemu/target/riscv/ |
H A D | cpu.c | 43 RVC, RVS, RVU, RVH, RVJ, RVG, 0}; 382 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVF | RVD | RVC | RVU); in riscv_any_cpu_init() 437 RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv64_sifive_u_cpu_init() 455 riscv_cpu_set_misa(env, MXL_RV64, RVI | RVM | RVA | RVC | RVU); in rv64_sifive_e_cpu_init() 472 riscv_cpu_set_misa(env, MXL_RV64, RVG | RVC | RVS | RVU); in rv64_thead_c906_cpu_init() 503 riscv_cpu_set_misa(env, MXL_RV64, RVG | RVC | RVS | RVU | RVH); in rv64_veyron_v1_cpu_init() 573 RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv32_sifive_u_cpu_init() 591 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVC | RVU); in rv32_sifive_e_cpu_init() 608 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVC | RVU); in rv32_ibex_cpu_init() 625 riscv_cpu_set_misa(env, MXL_RV32, RVI | RVM | RVA | RVF | RVC | RVU); in rv32_imafcu_nommu_cpu_init() [all …]
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H A D | op_helper.c | 344 riscv_has_ext(env, RVU) ? PRV_U : PRV_M); in helper_mret()
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H A D | cpu.h | 68 #define RVU RV('U') macro
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H A D | csr.c | 317 if (riscv_has_ext(env, RVU)) { in umode() 1299 valid = riscv_has_ext(env, RVU); in legalize_mpp()
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/openbmc/qemu/target/riscv/tcg/ |
H A D | tcg-cpu.c | 324 if (riscv_has_ext(env, RVS) && !riscv_has_ext(env, RVU)) { in riscv_cpu_validate_set_extensions() 789 MISA_CFG(RVU, true),
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/openbmc/linux/ |
H A D | MAINTAINERS | 12778 MARVELL OCTEONTX2 RVU ADMIN FUNCTION DRIVER
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