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Searched refs:RVC_RS1S (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/riscv/kernel/
H A Dtraps_misaligned.c119 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) macro
137 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
/openbmc/linux/arch/riscv/kvm/
H A Dvcpu_insn.c105 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) macro
125 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))