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Searched refs:RTC_REG_A (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/tests/qtest/
H A Drtc-test.c184 cmos_write(RTC_REG_A, 0x76); in set_year_20xx()
192 cmos_write(RTC_REG_A, 0x26); in set_year_20xx()
207 cmos_write(RTC_REG_A, 0x76); in set_year_20xx()
209 cmos_write(RTC_REG_A, 0x26); in set_year_20xx()
219 cmos_write(RTC_REG_A, 0x76); in set_year_20xx()
221 cmos_write(RTC_REG_A, 0x26); in set_year_20xx()
236 cmos_write(RTC_REG_A, 0x76); in set_year_1980()
244 cmos_write(RTC_REG_A, 0x26); in set_year_1980()
313 cmos_write(RTC_REG_A, 0x76); in set_time()
315 cmos_write(RTC_REG_A, 0x26); in set_time()
[all …]
/openbmc/linux/arch/mips/mti-malta/
H A Dmalta-time.c78 while (CMOS_READ(RTC_REG_A) & RTC_UIP); in estimate_frequencies()
79 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); in estimate_frequencies()
85 while (CMOS_READ(RTC_REG_A) & RTC_UIP); in estimate_frequencies()
89 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); in estimate_frequencies()
95 while (CMOS_READ(RTC_REG_A) & RTC_UIP); in estimate_frequencies()
/openbmc/qemu/hw/rtc/
H A Dmc146818rtc.c83 (s->cmos_data[RTC_REG_A] & 0x70) <= 0x20); in rtc_running()
144 period_code = s->cmos_data[RTC_REG_A] & 0x0f; in rtc_periodic_clock_ticks()
261 if ((s->cmos_data[RTC_REG_A] & 0x60) == 0x60) { in check_update_timer()
282 if (!(s->cmos_data[RTC_REG_A] & REG_A_UIP) && in check_update_timer()
410 assert((s->cmos_data[RTC_REG_A] & 0x60) != 0x60); in rtc_update_timer()
414 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; in rtc_update_timer()
469 case RTC_REG_A: in cmos_ioport_write()
481 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; in cmos_ioport_write()
657 s->cmos_data[RTC_REG_A] |= REG_A_UIP; in update_in_progress()
698 case RTC_REG_A: in cmos_ioport_read()
[all …]
/openbmc/linux/arch/arm/mach-footbridge/
H A Disa-rtc.c39 CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A); in isa_rtc_init()
49 if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ && in isa_rtc_init()
/openbmc/u-boot/include/linux/
H A Dmc146818rtc.h37 #define RTC_REG_A 10 macro
45 #define RTC_FREQ_SELECT RTC_REG_A
/openbmc/linux/include/linux/
H A Dmc146818rtc.h66 #define RTC_REG_A 10 macro
74 #define RTC_FREQ_SELECT RTC_REG_A
/openbmc/qemu/include/hw/rtc/
H A Dmc146818rtc_regs.h44 #define RTC_REG_A 10 macro
/openbmc/linux/arch/mips/kernel/
H A Dcevt-ds1287.c38 CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A); in ds1287_set_base_clock()