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Searched refs:RTC_CTL_BIT_RS1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/rtc/
H A Dds1337.c51 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ macro
156 (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
158 #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
H A Dds3231.c39 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ macro
140 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2); in rtc_reset()
H A Dds1374.c57 #define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */ macro
182 |RTC_CTL_BIT_RS1 in rtc_reset()
H A Dds1307.c44 #define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */ macro
185 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0); in rtc_reset()
308 RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | in ds1307_rtc_reset()