| /openbmc/u-boot/drivers/rtc/ |
| H A D | Kconfig | 2 # RTC drivers configuration
8 bool "Enable Driver Model for RTC drivers"
11 Enable drver model for real-time-clock drivers. The RTC uclass
17 bool "Enable Driver Model for RTC drivers in SPL"
20 Enable drver model for real-time-clock drivers. The RTC uclass
26 bool "Enable Driver Model for RTC drivers in TPL"
29 Enable drver model for real-time-clock drivers. The RTC uclass
38 The PCF2127 is a CMOS Real Time Clock (RTC) and calendar with an integrated
55 The Renesas (formerly Intersil) ISL1208 is a I2C Real Time Clock (RTC) and
60 This driver supports reading and writing the RTC/calendar and detects
[all …]
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| H A D | mk48t59.c | 39 return in8(RTC(reg)); in rtc_read()
44 out8(RTC(reg),val); in rtc_write()
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| /openbmc/u-boot/drivers/bootcount/ |
| H A D | Kconfig | 35 bool "Boot counter in AM33XX RTC IP block"
39 A bootcount driver for the RTC IP block found on many TI platforms.
40 This requires the RTC clocks, etc, to be enabled prior to use and
41 not all boards with this IP block on it will have the RTC in use.
64 Enable support for the bootcounter on an i2c (like RTC) device.
87 bool "Support RTC devices as a backing store for bootcount"
90 Enabled reading/writing the bootcount in a DM RTC device.
93 to the underlying RTC device) and an optional 'offset' property
97 and read16 ops of DM RTC devices.
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| /openbmc/u-boot/doc/ |
| H A D | README.SNTP | 5 syncronize RTC of the board. This command needs the command line
8 set local time to RTC, set the offset in second from UTC to the
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| /openbmc/bmcweb/redfish-core/include/generated/enums/ |
| H A D | manager.hpp | 52 RTC, enumerator
112 {DateTimeSource::RTC, "RTC"},
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| /openbmc/openbmc/meta-facebook/meta-harma/recipes-kernel/linux/linux-aspeed/ |
| H A D | harma.cfg | 16 # RTC
93 # RTC sensor
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| /openbmc/u-boot/board/keymile/km_arm/ |
| H A D | kwbimage_256M8_1.cfg | 63 # bit 0-1: 2, Tag RAM RTC RAM0
66 # bit 9-8: 2, Valid RAM RTC RAM
68 # bit 13-12: 2, Dirty RAM RTC RAM
70 # bit 17-16: 2, Data RAM RTC RAM0
72 # bit 21-20: 2, Data RAM RTC RAM1
74 # bit 25-24: 2, Data RAM RTC RAM2
76 # bit 29-28: 2, Data RAM RTC RAM3
81 # bit 17-16: 2, ECC RAM RTC RAM0
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| H A D | kwbimage_128M16_1.cfg | 63 # bit 0-1: 2, Tag RAM RTC RAM0
66 # bit 9-8: 2, Valid RAM RTC RAM
68 # bit 13-12: 2, Dirty RAM RTC RAM
70 # bit 17-16: 2, Data RAM RTC RAM0
72 # bit 21-20: 2, Data RAM RTC RAM1
74 # bit 25-24: 2, Data RAM RTC RAM2
76 # bit 29-28: 2, Data RAM RTC RAM3
81 # bit 17-16: 2, ECC RAM RTC RAM0
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| /openbmc/openbmc/meta-facebook/meta-yosemite5/recipes-kernel/linux/linux-aspeed/ |
| H A D | yosemite5.cfg | 16 # RTC
103 # RTC sensor
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| /openbmc/u-boot/arch/arm/mach-omap2/am33xx/ |
| H A D | Kconfig | 263 prompt "Enable RTC-DDR ONLY Support"
265 If you want RTC-DDR ONLY Support, say Y. RTC Only with DDR in
267 the other voltages are turned off apart from the RTC domain and DDR.
268 So only RTC is alive and ticking and one can program it to wake
269 up after a predetermined period. Once RTC alarm fires, the PMIC
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| /openbmc/openbmc-test-automation/extended/ |
| H A D | test_bmc_reset_loop.robot | 77 Verify BMC RTC And UTC Time Drift
92 Verify BMC RTC And UTC Time Drift
107 Verify BMC RTC And UTC Time Drift
116 Verify BMC RTC And UTC Time Drift
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| /openbmc/qemu/docs/system/arm/ |
| H A D | collie.rst | 12 * RTC
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| H A D | cubieboard.rst | 12 - RTC
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| H A D | highbank.rst | 16 - PL031 RTC
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| /openbmc/u-boot/board/freescale/m53017evb/ |
| H A D | README | 19 - arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
74 CONFIG_MCFRTC -- define to use common CF RTC driver
75 CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h
76 CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency
77 RTC_DEBUG -- define to show RTC debug message
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| /openbmc/u-boot/doc/device-tree-bindings/clock/ |
| H A D | st,stm32mp1.txt | 25 MPU AXI MCU PLL12 PLL3 PLL4 RTC MCO1 MCO2
32 MPU AXI MCU APB1 APB2 APB3 APB4 APB5 RTC MCO1 MCO2
43 but for RTC MCO1 MCO2, the coding is different:
125 23 /*RTC*/
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| /openbmc/qemu/hw/vmapple/ |
| H A D | Kconfig | 26 select PL031 # RTC
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| /openbmc/openbmc/meta-facebook/meta-minerva/recipes-kernel/linux/linux-aspeed/ |
| H A D | minerva.cfg | 35 # RTC
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| /openbmc/openbmc/meta-facebook/meta-fbdarwin/recipes-kernel/linux/linux-aspeed/ |
| H A D | fbdarwin.cfg | 19 # RTC driver
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| /openbmc/u-boot/drivers/power/pmic/ |
| H A D | Kconfig | 99 This is a Power Management IC with RTC, Fuel Gauge, MUIC control on Chip.
103 - RTC with two alarms
118 - RTC
129 an RTC and two low Rds (resistance (drain to source)) switches. It is
141 - RTC with two alarms
231 DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO
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| /openbmc/u-boot/include/configs/ |
| H A D | ls1012aqds.h | 55 #define RTC macro
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| /openbmc/openbmc/meta-facebook/meta-ventura/recipes-kernel/linux/linux-aspeed/ |
| H A D | ventura.cfg | 40 # RTC
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| /openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-kernel/linux/linux-aspeed/ |
| H A D | yosemite4.cfg | 24 # RTC driver
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| /openbmc/u-boot/board/freescale/m52277evb/ |
| H A D | README | 18 - arch/m68k/cpu/mcf5227x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
75 CONFIG_MCFRTC -- define to use common CF RTC driver
76 CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h
77 CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency
78 RTC_DEBUG -- define to show RTC debug message
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| /openbmc/openbmc/meta-facebook/meta-sanmiguel/recipes-kernel/linux/linux-aspeed/ |
| H A D | sanmiguel.cfg | 16 # RTC
|