Searched refs:RT5682_ADDA_CLK_1 (Results 1 – 3 of 3) sorted by relevance
210 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, in rt5682_sdw_hw_params()215 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, in rt5682_sdw_hw_params()
465 case RT5682_ADDA_CLK_1: in rt5682_readable_register()1314 snd_soc_component_update_bits(component, RT5682_ADDA_CLK_1, in set_filter_clk()2180 RT5682_ADDA_CLK_1, RT5682_I2S_M_DIV_MASK | in rt5682_hw_params()2748 snd_soc_component_update_bits(component, RT5682_ADDA_CLK_1, in rt5682_wclk_set_rate()
80 #define RT5682_ADDA_CLK_1 0x0073 macro