Home
last modified time | relevance | path

Searched refs:RT5677_PWR_ANLG1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/sound/
H A Drt5677.c33 {RT5677_PWR_ANLG1, 0xE9D5},
H A Drt5677.h114 #define RT5677_PWR_ANLG1 0x63 macro
/openbmc/linux/sound/soc/codecs/
H A Drt5677.c152 {RT5677_PWR_ANLG1 , 0x0055},
418 case RT5677_PWR_ANLG1: in rt5677_readable_register()
770 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_vad_source()
2743 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_vref_event()
3315 SND_SOC_DAPM_PGA_S("LOUT1 amp", 0, RT5677_PWR_ANLG1, RT5677_PWR_LO1_BIT,
3317 SND_SOC_DAPM_PGA_S("LOUT2 amp", 0, RT5677_PWR_ANLG1, RT5677_PWR_LO2_BIT,
3319 SND_SOC_DAPM_PGA_S("LOUT3 amp", 0, RT5677_PWR_ANLG1, RT5677_PWR_LO3_BIT,
4656 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_bias_level()
4663 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_bias_level()
4699 regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_bias_level()
H A Drt5677.h107 #define RT5677_PWR_ANLG1 0x63 macro