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Searched refs:RST_BUS_OHCI2 (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/include/dt-bindings/reset/
H A Dsun8i-h3-ccu.h72 #define RST_BUS_OHCI2 24 macro
H A Dsun50i-h616-ccu.h53 #define RST_BUS_OHCI2 44 macro
H A Dsun8i-r40-ccu.h76 #define RST_BUS_OHCI2 28 macro
/openbmc/u-boot/include/dt-bindings/reset/
H A Dsun8i-h3-ccu.h72 #define RST_BUS_OHCI2 24 macro
H A Dsun8i-r40-ccu.h76 #define RST_BUS_OHCI2 28 macro
/openbmc/u-boot/drivers/clk/sunxi/
H A Dclk_h3.c71 [RST_BUS_OHCI2] = RESET(0x2c0, BIT(30)),
H A Dclk_r40.c76 [RST_BUS_OHCI2] = RESET(0x2c0, BIT(31)),
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616.dtsi619 resets = <&ccu RST_BUS_OHCI2>,
633 resets = <&ccu RST_BUS_OHCI2>;
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-h3.c906 [RST_BUS_OHCI2] = { 0x2c0, BIT(30) },
969 [RST_BUS_OHCI2] = { 0x2c0, BIT(30) },
H A Dccu-sun50i-h616.c1036 [RST_BUS_OHCI2] = { 0xa8c, BIT(18) },
H A Dccu-sun8i-r40.c1196 [RST_BUS_OHCI2] = { 0x2c0, BIT(31) },
/openbmc/u-boot/arch/arm/dts/
H A Dsunxi-h3-h5.dtsi334 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
346 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
H A Dsun8i-r40.dtsi242 resets = <&ccu RST_BUS_OHCI2>;
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsunxi-h3-h5.dtsi350 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
362 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
H A Dsun8i-r40.dtsi503 resets = <&ccu RST_BUS_OHCI2>;