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Searched refs:RST_BUS_EMAC (Results 1 – 25 of 34) sorted by relevance

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/openbmc/u-boot/include/dt-bindings/reset/
H A Dsun8i-v3s-ccu.h59 #define RST_BUS_EMAC 12 macro
H A Dsun8i-a83t-ccu.h61 #define RST_BUS_EMAC 13 macro
H A Dsun50i-a64-ccu.h59 #define RST_BUS_EMAC 13 macro
H A Dsun8i-h3-ccu.h60 #define RST_BUS_EMAC 12 macro
H A Dsun50i-h6-ccu.h42 #define RST_BUS_EMAC 33 macro
H A Dsun8i-r40-ccu.h62 #define RST_BUS_EMAC 14 macro
/openbmc/linux/include/dt-bindings/reset/
H A Dsun8i-v3s-ccu.h59 #define RST_BUS_EMAC 12 macro
H A Dsun8i-a83t-ccu.h61 #define RST_BUS_EMAC 13 macro
H A Dsun50i-a64-ccu.h59 #define RST_BUS_EMAC 13 macro
H A Dsun8i-h3-ccu.h60 #define RST_BUS_EMAC 12 macro
H A Dsun50i-a100-ccu.h39 #define RST_BUS_EMAC 30 macro
H A Dsun50i-h6-ccu.h42 #define RST_BUS_EMAC 33 macro
H A Dsun20i-d1-ccu.h40 #define RST_BUS_EMAC 30 macro
H A Dsun8i-r40-ccu.h62 #define RST_BUS_EMAC 14 macro
/openbmc/u-boot/drivers/clk/sunxi/
H A Dclk_h6.c45 [RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
H A Dclk_a83t.c51 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
H A Dclk_a64.c53 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
H A Dclk_h3.c61 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-v3s.c658 [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
693 [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
H A Dccu-sun8i-h3.c894 [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
957 [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
H A Dccu-sun8i-a83t.c814 [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
H A Dccu-sun50i-a64.c875 [RST_BUS_EMAC] = { 0x2c0, BIT(17) },
H A Dccu-sun50i-a100.c1096 [RST_BUS_EMAC] = { 0x97c, BIT(16) },
H A Dccu-sun50i-h6.c1114 [RST_BUS_EMAC] = { 0x97c, BIT(16) },
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-v3s.dtsi545 resets = <&ccu RST_BUS_EMAC>;

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