/openbmc/u-boot/include/dt-bindings/reset/ |
H A D | sun8i-v3s-ccu.h | 63 #define RST_BUS_EHCI0 18 macro
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H A D | sun8i-a83t-ccu.h | 66 #define RST_BUS_EHCI0 18 macro
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H A D | sun50i-a64-ccu.h | 65 #define RST_BUS_EHCI0 19 macro
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H A D | sun8i-h3-ccu.h | 66 #define RST_BUS_EHCI0 18 macro
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H A D | sun50i-h6-ccu.h | 59 #define RST_BUS_EHCI0 50 macro
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H A D | sun8i-r40-ccu.h | 71 #define RST_BUS_EHCI0 23 macro
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/openbmc/linux/include/dt-bindings/reset/ |
H A D | sun8i-v3s-ccu.h | 63 #define RST_BUS_EHCI0 18 macro
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H A D | sun8i-a83t-ccu.h | 66 #define RST_BUS_EHCI0 18 macro
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H A D | sun50i-a64-ccu.h | 65 #define RST_BUS_EHCI0 19 macro
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H A D | sun8i-h3-ccu.h | 66 #define RST_BUS_EHCI0 18 macro
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H A D | sun50i-h616-ccu.h | 55 #define RST_BUS_EHCI0 46 macro
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H A D | sun50i-a100-ccu.h | 55 #define RST_BUS_EHCI0 46 macro
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H A D | sun50i-h6-ccu.h | 59 #define RST_BUS_EHCI0 50 macro
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H A D | sun20i-d1-ccu.h | 54 #define RST_BUS_EHCI0 44 macro
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H A D | sun8i-r40-ccu.h | 71 #define RST_BUS_EHCI0 23 macro
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/openbmc/u-boot/drivers/clk/sunxi/ |
H A D | clk_a83t.c | 55 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)),
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H A D | clk_a64.c | 57 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)),
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H A D | clk_h3.c | 65 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)),
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H A D | clk_r40.c | 71 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)),
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/openbmc/linux/drivers/clk/sunxi-ng/ |
H A D | ccu-sun8i-v3s.c | 662 [RST_BUS_EHCI0] = { 0x2c0, BIT(26) }, 697 [RST_BUS_EHCI0] = { 0x2c0, BIT(26) },
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H A D | ccu-sun8i-h3.c | 900 [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, 963 [RST_BUS_EHCI0] = { 0x2c0, BIT(24) },
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H A D | ccu-sun8i-a83t.c | 819 [RST_BUS_EHCI0] = { 0x2c0, BIT(26) },
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H A D | ccu-sun50i-a64.c | 881 [RST_BUS_EHCI0] = { 0x2c0, BIT(24) },
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/openbmc/u-boot/arch/arm/dts/ |
H A D | sunxi-h3-h5.dtsi | 292 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>; 302 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
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/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sunxi-h3-h5.dtsi | 304 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>; 316 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
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