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Searched refs:RST_BUS_CE (Results 1 – 25 of 29) sorted by relevance

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/openbmc/u-boot/include/dt-bindings/reset/
H A Dsun8i-v3s-ccu.h53 #define RST_BUS_CE 5 macro
H A Dsun50i-a64-ccu.h52 #define RST_BUS_CE 6 macro
H A Dsun8i-h3-ccu.h53 #define RST_BUS_CE 5 macro
H A Dsun50i-h6-ccu.h13 #define RST_BUS_CE 4 macro
H A Dsun8i-r40-ccu.h54 #define RST_BUS_CE 6 macro
/openbmc/linux/include/dt-bindings/reset/
H A Dsun8i-v3s-ccu.h53 #define RST_BUS_CE 5 macro
H A Dsun50i-a64-ccu.h52 #define RST_BUS_CE 6 macro
H A Dsun8i-h3-ccu.h53 #define RST_BUS_CE 5 macro
H A Dsun50i-h616-ccu.h13 #define RST_BUS_CE 4 macro
H A Dsun50i-a100-ccu.h13 #define RST_BUS_CE 4 macro
H A Dsun50i-h6-ccu.h13 #define RST_BUS_CE 4 macro
H A Dsun20i-d1-ccu.h14 #define RST_BUS_CE 4 macro
H A Dsun8i-r40-ccu.h54 #define RST_BUS_CE 6 macro
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dallwinner,sun8i-ce.yaml100 resets = <&ccu RST_BUS_CE>;
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-v3s.c652 [RST_BUS_CE] = { 0x2c0, BIT(5) },
687 [RST_BUS_CE] = { 0x2c0, BIT(5) },
H A Dccu-sun8i-h3.c887 [RST_BUS_CE] = { 0x2c0, BIT(5) },
950 [RST_BUS_CE] = { 0x2c0, BIT(5) },
H A Dccu-sun50i-a64.c868 [RST_BUS_CE] = { 0x2c0, BIT(5) },
H A Dccu-sun50i-h616.c995 [RST_BUS_CE] = { 0x68c, BIT(16) },
H A Dccu-sun50i-a100.c1070 [RST_BUS_CE] = { 0x68c, BIT(16) },
H A Dccu-sun50i-h6.c1085 [RST_BUS_CE] = { 0x68c, BIT(16) },
H A Dccu-sun8i-r40.c1174 [RST_BUS_CE] = { 0x2c0, BIT(5) },
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5.dtsi121 resets = <&ccu RST_BUS_CE>;
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-h3.dtsi205 resets = <&ccu RST_BUS_CE>;
H A Dsun8i-v3s.dtsi291 resets = <&ccu RST_BUS_CE>;
/openbmc/linux/arch/riscv/boot/dts/allwinner/
H A Dsunxi-d1s-t113.dtsi429 resets = <&ccu RST_BUS_CE>;

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