Home
last modified time | relevance | path

Searched refs:RSTHANDSHAKECTRL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsdram_s10.c84 hmc_ecc_writel(0, RSTHANDSHAKECTRL); in emif_clear()
96 c2s = hmc_ecc_readl(RSTHANDSHAKECTRL) & DDR_HMC_RSTHANDSHAKE_MASK; in emif_reset()
109 hmc_ecc_writel(DDR_HMC_CORE2SEQ_INT_REQ, RSTHANDSHAKECTRL); in emif_reset()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_s10.h32 #define RSTHANDSHAKECTRL 0x214 macro