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Searched refs:RSR_SWRS (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/include/
H A Dmpc8xx.h110 #define RSR_SWRS 0x10000000 /* Software Watchdog Reset Status*/ macro
115 #define RSR_ALLBITS (RSR_JTRS|RSR_DBSRS|RSR_DBHRS|RSR_CSRS|RSR_SWRS|RSR_LLRS|RSR_ESRS|RSR_EHRS)
H A Dmpc83xx.h846 #define RSR_SWRS 0x00000008 macro
858 RSR_SWRS | RSR_BMRS | \
/openbmc/u-boot/drivers/sysreset/
H A Dsysreset_mpc83xx.c143 RSR_SWRS, "Software Watchdog"}, { in mpc83xx_sysreset_get_status()
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dcpu_init.c482 RSR_SWRS, "Software Watchdog"}, { in prt_83xx_rsr()