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Searched refs:RRSR (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/staging/rtl8712/
H A Drtl8712_ratectrl_regdef.h19 #define RRSR (RTL8712_RATECTRL_ + 0x21) macro
/openbmc/linux/drivers/staging/rtl8192u/
H A Dr8192U_hw.h171 RRSR = 0x310, // Response Rate Set enumerator
H A Dr8192U_core.c942 write_nic_dword(dev, RRSR, tmp); in rtl8192_update_cap()
2457 write_nic_dword(dev, RRSR, regRRSR); in rtl8192_hwconfig()
/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h179 RRSR = 0x310, enumerator
H A Dr8192E_dev.c142 rtl92e_writel(dev, RRSR, regTmp); in rtl92e_set_reg()
492 rtl92e_writel(dev, RRSR, regRRSR); in _rtl92e_hwconfig()
591 ulRegRead = (0xFFF00000 & rtl92e_readl(dev, RRSR)) | in rtl92e_start_adapter()
593 rtl92e_writel(dev, RRSR, ulRegRead); in rtl92e_start_adapter()
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dhw.c88 rtl_write_byte(rtlpriv, RRSR, rate_cfg & 0xff); in rtl92se_set_hw_reg()
89 rtl_write_byte(rtlpriv, RRSR + 1, in rtl92se_set_hw_reg()
133 rtl_write_byte(rtlpriv, RRSR + 2, reg_tmp); in rtl92se_set_hw_reg()
800 rtl_write_byte(rtlpriv, RRSR, 0xf0); in _rtl92se_macconfig_after_fwdownload()
802 rtl_write_byte(rtlpriv, RRSR, 0xff); in _rtl92se_macconfig_after_fwdownload()
803 rtl_write_byte(rtlpriv, RRSR + 1, 0x01); in _rtl92se_macconfig_after_fwdownload()
804 rtl_write_byte(rtlpriv, RRSR + 2, 0x00); in _rtl92se_macconfig_after_fwdownload()
H A Dreg.h148 #define RRSR 0x0181 macro
H A Dphy.c240 rtl_read_byte(rtlpriv, RRSR + 2); in rtl92s_phy_set_bw_mode()