Home
last modified time | relevance | path

Searched refs:RREG32_MC (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/radeon/
H A Drs400.c71 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL); in rs400_gart_tlb_flush()
115 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_enable()
179 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_gart_enable()
183 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_gart_enable()
201 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_disable()
331 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_debugfs_gart_info_show()
334 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE); in rs400_debugfs_gart_info_show()
336 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2); in rs400_debugfs_gart_info_show()
338 tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION); in rs400_debugfs_gart_info_show()
340 tmp = RREG32_MC(RS690_MCCFG_FB_LOCATION); in rs400_debugfs_gart_info_show()
[all …]
H A Drs600.c532 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
536 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
540 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
543 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
615 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_enable()
617 tmp = RREG32_MC(R_000009_MC_CNTL1); in rs600_gart_enable()
633 tmp = RREG32_MC(R_000009_MC_CNTL1); in rs600_gart_disable()
865 if (G_000000_MC_IDLE(RREG32_MC(R_000000_MC_STATUS))) in rs600_mc_wait_for_idle()
892 base = RREG32_MC(R_000004_MC_FB_LOCATION); in rs600_mc_init()
H A Dr520.c43 tmp = RREG32_MC(R520_MC_STATUS); in r520_mc_wait_for_idle()
99 tmp = RREG32_MC(R520_MC_CNTL0); in r520_vram_get_type()
H A Drs690.c44 tmp = RREG32_MC(R_000090_MC_SYSTEM_STATUS); in rs690_mc_wait_for_idle()
164 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); in rs690_mc_init()
180 h_addr = G_00005F_K8_ADDR_EXT(RREG32_MC(R_00005F_MC_MISC_UMA_CNTL)); in rs690_mc_init()
181 l_addr = RREG32_MC(R_00001E_K8_FB_LOCATION); in rs690_mc_init()
610 tmp = RREG32_MC(R_000104_MC_INIT_MISC_LAT_TIMER); in rs690_bandwidth_update()
H A Drv515.c126 tmp = RREG32_MC(MC_STATUS); in rv515_mc_wait_for_idle()
170 tmp = RREG32_MC(RV515_MC_CNTL) & MEM_NUM_CHANNELS_MASK; in rv515_vram_get_type()
1266 tmp = RREG32_MC(MC_MISC_LAT_TIMER); in rv515_bandwidth_update()
H A Dr600.c1483 h_addr = G_000012_K8_ADDR_EXT(RREG32_MC(R_000012_MC_MISC_UMA_CNTL)); in r600_mc_init()
1484 l_addr = RREG32_MC(R_000011_K8_FB_LOCATION); in r600_mc_init()
H A Dradeon.h2518 #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) macro