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Searched refs:RLC_PG_CNTL__RESERVED__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7237 #define RLC_PG_CNTL__RESERVED__SHIFT 0x00000004 macro
H A Dgfx_7_2_sh_mask.h7848 #define RLC_PG_CNTL__RESERVED__SHIFT 0x4 macro
H A Dgfx_8_0_sh_mask.h8752 #define RLC_PG_CNTL__RESERVED__SHIFT 0x5 macro
H A Dgfx_8_1_sh_mask.h9304 #define RLC_PG_CNTL__RESERVED__SHIFT 0x5 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23054 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h24396 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_9_1_sh_mask.h24345 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h26651 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h21849 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h34346 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h37589 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h33505 #define RLC_PG_CNTL__RESERVED__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h32526 #define RLC_PG_CNTL__RESERVED__SHIFT … macro