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Searched refs:RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3848 data |= RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK; in gfx_v7_0_init_gfx_cgpg()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7230 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK 0x00000002L macro
H A Dgfx_7_2_sh_mask.h7841 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK 0x2 macro
H A Dgfx_8_0_sh_mask.h8743 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK 0x2 macro
H A Dgfx_8_1_sh_mask.h9295 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23063 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_9_2_1_sh_mask.h24407 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_9_1_sh_mask.h24354 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_9_4_3_sh_mask.h26662 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_9_4_2_sh_mask.h21857 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_11_0_0_sh_mask.h34358 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_11_0_3_sh_mask.h37601 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_10_1_0_sh_mask.h33516 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro
H A Dgc_10_3_0_sh_mask.h32537 #define RLC_PG_CNTL__GFX_POWER_GATING_SRC_MASK … macro